Key facts
- Start date
- 1 June 2026
- End date
- 31 May 2029
- Funded by
- Chips JU
- Partners
- 26 organizations
- Total cost
- €14,500,644
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Open source design tools for analogue, mixed-signal and RF chips. ODE4EC-AMS makes open source EDA tools and open process design kits (PDKs) ready for real product development on mature technology nodes, so that start-ups, SMEs and universities can design analogue chips without expensive licences.
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Open source tools already let small teams design digital chips. Analogue, mixed-signal and RF design is harder: important steps such as noise simulation, parasitic extraction and electromagnetic analysis are still missing or not robust enough, and analogue layout is still largely drawn by hand. ODE4EC-AMS closes these gaps and proves the result on real silicon.
Noise and mixed-signal simulation, parasitic extraction and electromagnetic field solvers that are robust enough for product development.
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A modular framework for analogue circuit generators, from transistor level up to system level, with layout generation and automated sizing.
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Process design kits that work with open source tools, and reusable analogue and RF IP blocks validated in silicon.
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Design analogue and RF chips without the cost of commercial EDA licences.
Teaching material, tutorials and design examples for analogue, mixed-signal and RF design with open tools.
Reusable generators and validated IP that cut design time and can be shared across projects.
Contributions to established projects such as ngspice, OpenVAF, KLayout and Elmer.
Are you a company, university or developer interested in open source analogue design? We are happy to hear about your use cases. Follow the project on the AMS news page.
Project Coordinator, IHP
scholz@ihp-microelectronics.com
Project Manager, IHP
tsakalos@ihp-microelectronics.com

ODE4EC-AMS has received funding from the Chips Joint Undertaking (Chips JU) under Grant Agreement No 101252962. Funding and disclaimer →